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APT100F50J
500V, 103A, 0.036 Max, trr 390ns
N-Channel FREDFET
Power MOS 8TM is a high speed, high voltage N-channel switch-mode power MOSFET. A proprietary planar stripe design yields excellent reliability and manufacturability. Low switching loss is achieved with low input capacitance and ultra low Crss "Miller" capacitance. The intrinsic gate resistance and capacitance of the poly-silicon gate structure help control slew rates during switching, resulting in low EMI and reliable paralleling, even when switching at very high frequency. Reliability in flyback, boost, forward, and other circuits is enhanced by the high avalanche energy capability.
S G D
S
SO
2 T-
27
"UL Recognized"
ISOTOP (R)
file # E145592
APT100F50J Single die FREDFET
G
D
S
FEATURES
* Fast switching with low EMI * Low trr for high reliability * Ultra low Crss for improved noise immunity * Low gate charge * Avalanche energy rated * RoHS compliant
TYPICAL APPLICATIONS
* ZVS phase shifted and other full bridge * Half bridge * PFC and other boost converter * Buck converter * Single and two switch forward * Flyback
Absolute Maximum Ratings
Symbol ID IDM VGS EAS IAR Parameter Continuous Drain Current @ TC = 25C Continuous Drain Current @ TC = 100C Pulsed Drain Current Gate-Source Voltage Single Pulse Avalanche Energy 2 Avalanche Current, Repetitive or Non-Repetitive
1
Ratings 103 65 490 30 3350 75
Unit
A
V mJ A
Thermal and Mechanical Characteristics
Symbol PD RJC RCS TJ,TSTG VIsolation WT Characteristic Total Power Dissipation @ TC = 25C Junction to Case Thermal Resistance Case to Sink Thermal Resistance, Flat, Greased Surface Operating and Storage Junction Temperature Range RMS Voltage (50-60hHz Sinusoidal Waveform from Terminals to Mounting Base for 1 Min.) Package Weight -55 2500 1.03 29.2 Torque 10 Terminals and Mounting Screws. 1.1 MicrosemiWebsite-http://www.microsemi.com 0.15 150 C V oz g in*lbf N*m
04-2009 050-8178 Rev B
Min
Typ
Max 960 0.13
Unit W C/W
Static Characteristics
Symbol
VBR(DSS) VBR(DSS)/TJ RDS(on) VGS(th) VGS(th)/TJ IDSS IGSS
TJ = 25C unless otherwise specified
Test Conditions
VGS = 0V, ID = 250A Reference to 25C, ID = 250A VGS = 10V, ID = 75A VGS = VDS, ID = 5mA VDS = 500V VGS = 0V TJ = 25C TJ = 125C
APT100F50J
Typ 0.60 .28 4 -10 Unit V V/C 0.036 V 5 mV/C Max 250 1000 100 A nA
Parameter
Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Drain-Source On Resistance
3
Min 500
Gate-Source Threshold Voltage Threshold Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Source Leakage Current
2.5
VGS = 30V
Dynamic Characteristics
Symbol
gfs Ciss Crss Coss Co(cr) Co(er) Qg Qgs Qgd td(on) tr td(off) tf
4
TJ = 25C unless otherwise specified
Test Conditions
VDS = 50V, ID = 75A VGS = 0V, VDS = 25V f = 1MHz
Parameter
Forward Transconductance Input Capacitance Reverse Transfer Capacitance Output Capacitance Effective Output Capacitance, Charge Related
Min
Typ 115 24600 330 2645 1535
Max
Unit S
pF
VGS = 0V, VDS = 0V to 333V
5
Effective Output Capacitance, Energy Related Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Current Rise Time Turn-Off Delay Time Current Fall Time
VGS = 0 to 10V, ID = 75A, VDS = 250V Resistive Switching VDD = 333V, ID = 75A RG = 2.2 6 , VGG = 15V
775 620 140 280 105 125 280 90
nC
ns
Source-Drain Diode Characteristics
Symbol
IS ISM VSD trr Qrr Irrm dv/dt
Parameter
Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) 1 Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current Peak Recovery dv/dt
Test Conditions
MOSFET symbol showing the integral reverse p-n junction diode (body diode)
Min
D
Typ
Max 103
Unit
G S
A 490 1.0 390 720 V ns C A 20 V/ns
ISD = 75A, TJ = 25C, VGS = 0V TJ = 25C TJ = 125C ISD = 75A 3 diSD/dt = 100A/s VDD = 100V TJ = 25C TJ = 125C TJ = 25C TJ = 125C ISD 75A, di/dt 1000A/s, VDD = 333V, TJ = 125C
340 603 2.74 7.29 15.2 23.4
1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature. 2 Starting at TJ = 25C, L = 1.19mH, RG = 25, IAS = 75A.
04-2009 Rev B 050-8178
3 Pulse test: Pulse Width < 380s, duty cycle < 2%. 4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS. 5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of VDS less than V(BR)DSS, use this equation: Co(er) = -5.71E-7/VDS^2 + 1.33E-7/VDS + 3.80E-10. 6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452)
Microsemi reserves the right to change, without notice, the specifications and information contained herein.
APT100F50J
600
V
GS
300
= 10V T = 125C
J
V
GS
= 7,8 & 10V
500 ID, DRAIN CURRENT (A) ID, DRIAN CURRENT (A)
TJ = -55C
250
400
TJ = 25C
200
6V
300
150
200
TJ = 150C
100
5V 4.5V
100
TJ = 125C
50 0
0
0 5 10 15 20 25 VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V) Figure 1, Output Characteristics
0
5 10 15 20 25 30 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 2, Output Characteristics
RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE
2.5
NORMALIZED TO VGS = 10V @ 75A
500
VDS> ID(ON) x RDS(ON) MAX. 250SEC. PULSE TEST @ <0.5 % DUTY CYCLE
2.0 ID, DRAIN CURRENT (A)
400
1.5
300
TJ = -55C
1.0
200
TJ = 25C TJ = 125C
0.5
100
0 -55 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (C) Figure 3, RDS(ON) vs Junction Temperature 200 180
TJ = -55C
0
0
1 2 3 4 5 6 7 VGS, GATE-TO-SOURCE VOLTAGE (V) Figure 4, Transfer Characteristics
8
40,000 Ciss 10,000 C, CAPACITANCE (pF)
gfs, TRANSCONDUCTANCE
160 140 120 100 80 60 40 20 0 0 20
TJ = 25C TJ = 125C
1000
Coss
100
Crss
40 60 80 100 120 140 160 ID, DRAIN CURRENT (A) Figure 5, Gain vs Drain Current
10
100 200 300 400 500 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 6, Capacitance vs Drain-to-Source Voltage
0
16 VGS, GATE-TO-SOURCE VOLTAGE (V) 14 12
ID = 75A
500 ISD, REVERSE DRAIN CURRENT (A) 450 400 350 300 250 200 150 100 50 0.3 0.6 0.9 1.2 1.5 VSD, SOURCE-TO-DRAIN VOLTAGE (V) Figure 8, Reverse Drain Current vs Source-to-Drain Voltage 0 0
TJ = 25C
VDS = 100V
10
VDS = 250V
8 6
VDS = 400V
4 2 100 200 300 400 500 600 700 800 Qg, TOTAL GATE CHARGE (nC) Figure 7, Gate Charge vs Gate-to-Source Voltage 0 0
050-8178
Rev B
04-2009
TJ = 150C
APT100F50J
600
IDM
600
IDM
100 ID, DRAIN CURRENT (A)
100 ID, DRAIN CURRENT (A)
10
Rds(on)
13s 100s 1ms 10ms 100ms DC line TJ = 125C TC = 75C
13s
10
Rds(on) TJ = 150C TC = 25C
100s 1ms 10ms 100ms DC line
1
1
Scaling for Different Case & Junction Temperatures: ID = ID(T = 25C)*(TJ - TC)/125
0.1
1
10 100 800 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 9, Forward Safe Operating Area
0.1
C
10 100 800 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 10, Maximum Forward Safe Operating Area
1
0.14 0.12 0.10 0.08 0.5 0.06 0.04 0.02 0 0.3 SINGLE PULSE D = 0.9
Note:
ZJC, THERMAL IMPEDANCE (C/W)
PDM
0.7
t1 t2
t1 = Pulse Duration Duty Factor D = 1/t2 Peak TJ = PDM x ZJC + TC
t
0.1 0.05 10-5
10-3 10-2 10-1 RECTANGULAR PULSE DURATION (seconds) Figure 11. Maximum Effective Transient Thermal Impedance Junction-to-Case vs Pulse Duration
10-4
1.0
SOT-227 (ISOTOP(R)) Package Outline
31.5 (1.240) 31.7 (1.248) 7.8 (.307) 8.2 (.322) W=4.1 (.161) W=4.3 (.169) H=4.8 (.187) H=4.9 (.193) (4 places) 11.8 (.463) 12.2 (.480) 8.9 (.350) 9.6 (.378) Hex Nut M4 (4 places)
r = 4.0 (.157) (2 places)
4.0 (.157) 4.2 (.165) (2 places)
25.2 (0.992) 0.75 (.030) 12.6 (.496) 25.4 (1.000) 0.85 (.033) 12.8 (.504)
3.3 (.129) 3.6 (.143) 14.9 (.587) 15.1 (.594)
1.95 (.077) 2.14 (.084)
* Source
Drain
* Emitter terminals are shorted internally. Current handling capability is equal for either Source terminal.
04-2009
30.1 (1.185) 30.3 (1.193) 38.0 (1.496) 38.2 (1.504)
* Source
Gate
Rev B
Dimensions in Millimeters and (Inches)
ISOTOP(R) is a registered trademark of ST Microelectronics NV. Microsemi's products are covered by one or more of U.S.patents 4,895,810 5,045,903 5,089,434 5,182,234 5,019,522 5,262,336 6,503,786 5,256,583 4,748,103 5,283,202 5,231,474 5,434,095 5,528,058 and foreign patents. US and Foreign patents pending. All Rights Reserved.
050-8178

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